RISC-V at Rice
The RVR Lab is a hub for the next wave of computer engineering education. We provide students with engagement, enrichment, and experiential learning opportunities by connecting students to the RISC-V open Instruction Set Architecture. As students grow, the RISC-V ISA grows with them spanning the spectrum from microcontrollers to vector microprocessors.
The RVR Lab is a new experiential computer engineering research and teaching lab placing both undergraduate and graduate students and faculty at the forefront of a new era of computing technology, giving them experience in what will be the dominant approach to computer architecture for decades.
Mission
Athena, A RISC-V Development Board
Athena is a new RISC-V microcontroller development board designed to support flexible embedded system prototyping and undergraduate computer engineering course instruction.
Embench
Embench is RVR’s effort to create a standardized benchmark suite to compare the performance of different RISC-V embedded systems.
Hydra & PyRho, Tools for RISC-V Code Size Analysis
Hydra enables simple, error-free compilation and disassembly of C benchmarks across multiple ISA’s and toolchains. Its counterpart, PyRho, parses disassembly files to extract key instruction usage data and generates a detailed Excel workbook suitable for a variety of code size analysis approaches.
Building High Performance RISC-V Processors from Scratch: An End-to-End Design Course
To continue the Electrical & Computer Engineering department’s efforts to bolster practical implementation-based education, the RVR team is generating engaging course content that encourages undergraduate students to develop a high performance, modular RISC-V processor from the Verilog RTL description to layout and mask creation. The course augments Elec 425/525 by allowing students to delve deeper into the concepts of pipelining, hazard control, and branch prediction through industry-adjacent designs. Further, the course developers aim for students to implement a fully functioning processor with peripherals on an FPGA, that is capable of running Linux. The distinguishing factor is the focus on end-to-end design, rather than focusing solely on initial behavioral simulations.
3D Printed Case and Mount for Athena
To increase ease of use and implementation of Athena,
the RVR Lab has also been designing and iterating on two 3D
printable devices from the ground up: a compact case that holds
Athena in addition to a battery, as well as a mount that allows
Athena to be easily installed almost anywhere. These two devices
aim to make Athena an easy-to-implement solution for a vast
array of projects and experiments. This report details the design
specifications and justifications of the five iterations of the Case
and two iterations of the Mount.
News
RVR Awarded Faculty Initiatives Fund Grant
Ray Simar, Joseph Young, and Jennifer Hellar awarded Faculty Initiatives Fund Grant
